Intel Xeon Phi Coprocessor Architecture and Tools

Technical computing has become an integral part of research and development of new technologies in modern civilization. It is used in industry and academia equally to produce new products, produce weather forecasting, geosciences exploration, financial modeling, car crash simulation, electro-magnetic field propagation from mobile phones etc. However, current computational power limits the type of research needed to push the edge of understanding of these physical processes. Massively parallel processors like Intel® MIC architecture has been developed to increase the computational power to remove these research barriers. However, to exploit MIC co-processor capable of providing more than Teraflops of double precision floating point performance in Technical Computing applications will require careful design of algorithm, data structure and understanding to match the hardware capabilities and idiosyncrasies of the processor. This book is targeted to give the readers an in-depth look at the MIC processor architecture, parallel data structure and algorithm used by various Technical Computing applications that will be suitable for such a coprocessor. We shall also look at the various source code level optimizations that can be done to exploit some of the processor features.